Temperature inversion

 What is Temp Inversion?

As the temperature increases, the delay of the cell can

• Decrease due to decrease in threshold voltage (Vt).
• Increase due to decrease in the mobility.

The dominating impacts of mobility and threshold voltage (Vt) determine the ensuing thermal trend associated with temperature inversion effects, which can cause a cell's delay to either increase or decrease.

The threshold voltage drop brought on by temperature change is minimal if the gate overdrive voltage (Vdd - Vt) is high. However, the mobility effect predominates, which causes the gate's delay to increase as the temperature rises.

But, if Gate overdrive voltage (Vdd - Vt) has reduced such that the decrease in threshold voltage effect dominates and delay decreases with the increases in temperature.

 below nodes, the threshold voltage (Vt) has not been reduced much but the supply voltages has reduced considerably to cater low leakage power concerns. The result is that the gate overdrive voltage (Vdd - Vt) has reduced and thus more prominent temperature inversion effects are observed.

Fig 1: Temperature inversion at different voltages and for different Vt flavors.

From the above graph, it is clear that Temp. Inversion effect tends to come into picture at lower voltages with more prominent effect on Higher Vt cells. Temp. Inversion effect will be more in lower technology nodes.

Fig 2: Temperature Inversion effect @different input transitions for HVT cell

Traditional Approach: High Vt cells are used to refine the design initially for greater power optimization, and then Low Vt cells are revealed for incremental timing optimization in the timing critical path alone. More design variation and power consumption will result from the HVT cell (High Vt, which is most prone to variation) driving the LVT logic.

Proposed Approach using Intelligent Vt structuring: Structuring is such that wherever High Vt cell is driving Low Vt cell, replace that occurrence with Low Vt cell driving the High Vt cell without degrading:-

• Slew values.
• Timing.
• Leakage Power.

Fig.3: Traditional vs Proposed Approach

Below are the analysis results on the cell level implementation of the above described approaches.

Fig.4: Cell level results comparison for Traditional vs Proposed Approach

Design Implementation Algorithm:

Better Transition in design would :-

• Suppress the effect of temperature inversion.
• Help to meet higher frequency targets.
• Reduce the internal power.

But better transition would require high drive strength or more Low Vt cells or more redundant buffers in the design which leads to: -

• More leakage power.
• More switching power.

This increase in power is not acceptable!!!