1. specification : This is the first stage in the design process where we define the important parameters of the system that has to be designed into a specification . 2. Behavioural description : T his is the stage where the design team and verification team come into the cycle where they generate RTL code using test benches. This is known as behavioral simulation . 3 . RTL description : RTL code is a set of code that checks whether the RTL implementation meets the design verification) is done in HDL, a lot of code coverage metrics are proposed for HDL. 4. functional verification : Functional Verification is the process of verifying the functional characteristics of the design by generating different input stimuli and checking for correct behavior of the design implementation. 5. Logic synthesis: the process of converting get level netlist with their logical connectivity for simulated RTL code. In this synthesis, we can check not only functionali...
this is all about vlsi back end domains and description about synthesis,physical design and physical verification